CS 150 Computer Organization & Architecture

Total Credits: 3 cr

Course Coordinator: Bob Rinker

URL: http://www2.cs.uidaho.edu/~rinker/cs150/index.html

Current Catalog Description: Digital logic and digital systems, machine-level representation of data, assembly-level machine organization, memory system organization and architecture, interfacing and communication, functional organization, multiprocessing and alternative architectures.   Prereq: CS 120

Textbook: Introduction to Computing Systems, Second Ed., Patt and Patel, McGraw-Hill, 2004 or equivalent text.

References: None.

Course Goals: Teach

Prerequisites by Topic:

• Knowledge of high level programming language including: basic data types (integers, floating point, Boolean, character, and pointers), control flow (if statements and loops), procedure calls and parameter passing.

Major Topics Covered in the Course: (duration) (CC 2001 BOK reference)

• Digital logic (3 hours) (AR1)
• Number systems, bases, and IEEE floating point representation (3 hours) (AR2)
• ALU design, multiplication algorithms (3 hours) (AR6)
• Assembly and Machine Language (3 hours) (AR3)
• CPU structural design (6 hours) (AR6)
• Control Unit Design (2 hours) (AR6)
• Multi-cycle CPU design (2 hours) (AR7)
• Pipeline CPU theory and design (4 hours) (AR7)
• Memory and cache design (4 hours) (AR4)
• Performance metrics (6 hours) (AR8)
• I/O, bus systems and interfacing (7 hours) (AR5)

Laboratory projects (specify number of weeks on each): There are typically 2-3 homework assignments in this class, each of which is expected to take 2 weeks to complete. Late assignments are worth no credit.

Estimated Curriculum Category Content:

Area	Core	Advanced	Area	Core	Advanced
Algorithms			Data Structures
Software Design			Prog. Languages
Computer Arch	3 cr		Other

Oral and Written Communications: : None.

Social and Ethical Issues: The class deals with ethics primarily in the context of suspicious marketing practices based on performance metrics or business practices as evidenced by Intel with the division bug in the Pentium processor. A small amount of the class time is devoted to this topic.

Theoretical Content: The class covers digital logic, and the students are required to design certain types of circuits based on this knowledge.  Students are expected to understand IEEE floating point representation.  Students are expected to be able to convert both integers and fractions between different number bases.  Machine and assembly language is covered, and students are expected to be able to understand both, as well as convert from machine language to assembly language.  Students are expected to understand the theory of  CPU design.  Students are expected to understand the concepts of temporal and spatial locality, and how this relates to cache design.  Students are expected to know the differences between polling and interrupt-based I/O, and be able to explain the differences as well as do calculation based on this.  Students are expected to understand how bus systems work.  These topics comprise 40% of the course content.

Problem Analysis: Alternative CPU designs such as a multi-cycle and pipelined implementation of the MIPS architecture are presented and students must be able to explain the differences between these designs as well as make trade-offs (complexity, performance, and so forth) between them.  Memory and caching schemes are presented and students are expected to be able to discuss the differences and trade-offs between various caching schemes (e.g., overhead, search time, and thrashing potential). Various performance metrics are presented, and students are expected to understand and perform calculations based on these metrics.  These topics comprise 40% of the course content.

Solution Design: The students are expected to design small circuits according to a verbal description or a truth table.  The students are expected to design a simple ALU which performs various mathematical and logical operations, given two small (typically 8 bit) binary inputs.  These topics comprise 16% of the course content.

Course Outcomes: The following list documents the course outcomes and crossreferences them to the BSCS program outcomes. The letter at the beginning of each reference identifies the program outcome supported. The numbers sequentially identify the course outcome for this course. After completing CS 150 a student should:

• Convert between binary, hex and decimal number representations. (c-1)
• Perform addition and subtraction using signed (2’s complement) and unsigned binary and hexadecimal numbers. (c-2)
• Design, implement and evaluate assembly language programs that implement basic functionality such as: arithmetic functions, I/O, and interrupt handling. (c-3)
• Be able to invoke a simple assembly language program from a high-level language (C/C++) program. (c-4)
• Demonstrate the ability to design simple assembly language programs that makes appropriate use of a registers, static memory locations and a stack. (c-5)
• Design and evaluate combinatorial and sequential logic circuits with multiple inputs and outputs. (c-6)
• Demonstrate the ability to design simple combinatorial and sequential logic circuits, using a small number of logic gates. (c-7)
• Demonstrate the ability to design simple digital circuits and assembly language programs to solve given problems. (c-8)
• Draw and/or analyze a finite state diagram. (c-9)